As integrated circuit dimensions continue to decrease, resistive capacitive (RC) delay, crosstalk noise, and power dissipation of the interconnect structure may become limiting factors for ultra-large-scale integration of integrated circuits. Materials with low dielectric constants may be used to replace silicon dioxide as inter-metal dielectrics. Alternatively, air bridge (gap) structures may replace the dielectrics surrounding the metal wire, where air, in principle, may provide an even lower dielectric constant. Current integration schemes employing air gaps may utilize methods employing removal of a sacrificial organic polymer, high pressure chemical vapor deposition (CVD) to pinch off formed air gaps at the entrance providing a capped structure, or multi-layered structures combined with multi-step lithographic exposure, developing, and etching. There exists a need for a method having reduced complexity for producing nanoscale air gap structures.